<h1>HDI PCB Design Guide 2025: Mastering High-Density Interconnect Technology</h1> <h2>Overview</h2> <p>High-Density Interconnect (HDI) PCBs represent the cutting edge of PCB technology, enabling smaller, faster, and more powerful electronic devices. This comprehensive guide covers HDI design principles, technologies, and best practices for 2025.</p> <h2>What is HDI Technology?</h2> <h3>Definition</h3> <p>HDI PCBs feature:</p> <ul> <li><strong>Microvias</strong>: Vias ≤0.15mm (6 mil) in diameter</li> <li><strong>High Via Density</strong>: More than 600 vias per square inch</li> <li><strong>Multiple Lamination Cycles</strong>: Sequential build-up layers</li> <li><strong>Fine Pitch</strong>: Smaller traces and spaces</li> <li><strong>Passive Components</strong>: Embedded resistors and capacitors</li> </ul> <h3>Applications</h3> <ul> <li><strong>Smartphones</strong>: Miniaturization requirements</li> <li><strong>Wearables</strong>: Form factor constraints</li> <li><strong>Medical Devices</strong>: Portable medical equipment</li> <li><strong>Aerospace/Defense</strong>: High reliability in small packages</li> <li><strong>IoT Devices</strong>: Connected, compact electronics</li> <li><strong>Automotive</strong>: ADAS, infotainment systems</li> </ul> <h2>HDI Stack-up Designs</h2> <h3>Type I: Single Layer Build-up</h3> <ul> <li><strong>Structure</strong>: 1+N+1</li> <li><strong>Microvias</strong>: One side only</li> <li><strong>Applications</strong>: Moderate density requirements</li> <li><strong>Cost</strong>: Lower than advanced types</li> </ul> <h3>Type II: Double Layer Build-up</h3> <ul> <li><strong>Structure</strong>: 2+N+2</li> <li><strong>Microvias</strong>: Both sides</li> <li><strong>Applications</strong>: High-density designs</li> <li><strong>Cost</strong>: Moderate</li> </ul> <h3>Type III: Multiple Build-up Layers</h3> <ul> <li><strong>Structure</strong>: 3+N+3 or more</li> <li><strong>Microvias</strong>: Stacked microvias</li> <li><strong>Applications</strong>: Very high density</li> <li><strong>Cost</strong>: Higher</li> </ul> <h2>Microvia Technology</h2> <h3>Microvia Types</h3> <h4>Blind Microvias</h4> <ul> <li><strong>Definition</strong>: From outer layer to inner layer</li> <li><strong>Aspect Ratio</strong>: ≤1:1 recommended</li> <li><strong>Laser Types</strong>: CO2, UV, or hybrid</li> <li><strong>Applications</strong>: Most common HDI application</li> </ul> <h4>Buried Vias</h4> <ul> <li><strong>Definition</strong>: Between inner layers only</li> <li><strong>Process</strong>: Created during lamination</li> <li><strong>Applications</strong>: High-density interconnects</li> <li><strong>Visibility</strong>: Not visible from outer layers</li> </ul> <h4>Stacked Microvias</h4> <ul> <li><strong>Definition</strong>: Multiple microvias aligned vertically</li> <li><strong>Complexity</strong>: Requires precise alignment</li> <li><strong>Applications</strong>: Ultra-high density</li> <li><strong>Cost</strong>: Higher due to complexity</li> </ul> <h3>Microvia Dimensions</h3> <table> <thead> <tr> <th>Via Type</th> <th>Minimum Diameter</th> <th>Minimum Pad</th> <th>Land</th> <th>Aspect Ratio</th> </tr> </thead> <tbody><tr> <td>Laser Microvia</td> <td>0.075mm (3 mil)</td> <td>0.20mm (8 mil)</td> <td>0.25mm (10 mil)</td> <td>≤1:1</td> </tr> <tr> <td>Mechanical Microvia</td> <td>0.15mm (6 mil)</td> <td>0.30mm (12 mil)</td> <td>0.40mm (16 mil)</td> <td>≤0.8:1</td> </tr> </tbody></table> <h2>Design Guidelines</h2> <h3>Trace and Space</h3> <table> <thead> <tr> <th>Layer Type</th> <th>Minimum Trace</th> <th>Minimum Space</th> <th>Application</th> </tr> </thead> <tbody><tr> <td>External (Type I)</td> <td>0.075mm (3 mil)</td> <td>0.075mm (3 mil)</td> <td>Standard HDI</td> </tr> <tr> <td>External (Type II)</td> <td>0.05mm (2 mil)</td> <td>0.05mm (2 mil)</td> <td>Advanced HDI</td> </tr> <tr> <td>Internal</td> <td>0.075mm (3 mil)</td> <td>0.075mm (3 mil)</td> <td>All types</td> </tr> </tbody></table> <h3>Via-in-Pad Design</h3> <h4>Benefits</h4> <ul> <li><strong>Shorter Connections</strong>: Reduced inductance</li> <li><strong>Space Savings</strong>: No via escape routing needed</li> <li><strong>Better Signal Integrity</strong>: Minimizes stubs</li> <li><strong>Thermal Performance</strong>: Better heat dissipation</li> </ul> <h4>Process Steps</h4> <ol> <li>Drill microvia</li> <li>Plate via</li> <li>Fill with epoxy (conductive or non-conductive)</li> <li>Cure epoxy</li> <li>Planarize surface</li> <li>Plate over</li> <li>Pattern and etch outer layer</li> </ol> <h3>BGA Escape Routing</h3> <table> <thead> <tr> <th>BGA Pitch</th> <th>Recommended HDI Type</th> <th>Via Size</th> <th>Trace/Space</th> </tr> </thead> <tbody><tr> <td>≥1.0mm</td> <td>Standard PCB</td> <td>0.3mm</td> <td>0.15/0.15mm</td> </tr> <tr> <td>0.8mm</td> <td>Type I HDI</td> <td>0.15mm</td> <td>0.1/0.1mm</td> </tr> <tr> <td>0.65mm</td> <td>Type II HDI</td> <td>0.10mm</td> <td>0.08/0.08mm</td> </tr> <tr> <td>0.5mm</td> <td>Type III HDI</td> <td>0.075mm</td> <td>0.06/0.06mm</td> </tr> <tr> <td>≤0.4mm</td> <td>Type III/IV HDI</td> <td>0.05mm</td> <td>0.05/0.05mm</td> </tr> </tbody></table> <h2>Materials for HDI</h2> <h3>Dielectric Materials</h3> <h4>Standard Materials</h4> <ul> <li><strong>FR-4</strong>: Most common, good performance</li> <li><strong>High-Tg FR-4</strong>: For high-temperature applications</li> <li><strong>Low-Dk FR-4</strong>: For high-speed applications</li> </ul> <h4>Advanced Materials</h4> <ul> <li><strong>Rogers</strong>: For RF/microwave</li> <li><strong>Megtron</strong>: For high-speed digital</li> <li><strong>Isola</strong>: Low-loss materials</li> <li><strong>Polyimide</strong>: For extreme environments</li> </ul> <h2>Impedance Control</h2> <h3>Single-ended Impedance</h3> <h4>Microstrip Impedance Formula:</h4> <p>Z0 = (87 / sqrt(εr + 1.41)) × ln(5.98h / (0.8w + t))</p> <h4>Stripline Impedance Formula:</h4> <p>Z0 = (60 / sqrt(εr)) × ln(4h / (0.67π(w + t)(0.8 + t/h)))</p> <p>Where:</p> <ul> <li>Z0 = Characteristic impedance</li> <li>εr = Dielectric constant</li> <li>h = Dielectric thickness</li> <li>w = Trace width</li> <li>t = Trace thickness</li> </ul> <h3>Target Impedances</h3> <ul> <li><strong>Single-ended</strong>: 50Ω (most common)</li> <li><strong>Differential USB</strong>: 90Ω</li> <li><strong>Differential PCIe</strong>: 85Ω</li> <li><strong>Differential Ethernet</strong>: 100Ω</li> </ul> <h2>Signal Integrity</h2> <h3>High-Speed Considerations</h3> <h4>Frequency-Dependent Losses</h4> <ul> <li><strong>Dielectric Loss</strong>: Material-dependent</li> <li><strong>Copper Loss</strong>: Surface roughness effect</li> <li><strong>Radiation Loss</strong>: Improper termination</li> </ul> <h4>Via Stubs</h4> <ul> <li><strong>Problem</strong>: Signal reflections from stubs</li> <li><strong>Solution</strong>: Back-drilling or microvias</li> <li><strong>Benefit</strong>: Improved signal integrity</li> </ul> <h2>Design for Manufacturing (DFM)</h2> <h3>Design Rules</h3> <h4>Minimum Feature Size</h4> <ul> <li>Follow manufacturer&#39;s capabilities</li> <li>Include appropriate tolerances</li> <li>Consider yield implications</li> </ul> <h4>Panel Utilization</h4> <ul> <li>Optimize board size for standard panels</li> <li>Consider array configuration</li> <li>Include tooling holes and fiducials</li> </ul> <h3>Documentation</h3> <h4>Fabrication Notes</h4> <ol> <li>Material specifications</li> <li>Layer stack-up details</li> <li>Impedance requirements</li> <li>Controlled impedance traces</li> <li>Special requirements (via fill, etc.)</li> </ol> <h2>Best Practices Summary</h2> <h3>Design</h3> <ol> <li>Use appropriate HDI type for application</li> <li>Follow manufacturer&#39;s DFM guidelines</li> <li>Consider manufacturability early</li> <li>Include test points for verification</li> <li>Document special requirements clearly</li> </ol> <hr> <p><strong>References</strong>: IPC-2226, IPC-6016, IPC-6012</p>